Microwatt goes multiprocessor
The newest pull request, currently to be committed, allows more than one processor core to be created by adding an NCPUS option to soc.vhdl. These cores can be debugged separately with JTAG and have the same view of memory and the same timebase value, and can be individually activated. For interrupts, they each have their own presentation controller in the XICS.
Although Microwatt cores are currently of only modest performance, more cores — if you have the space — can certainly improve its throughput and the range of applications it could be practical for. Unfortunately, we've still yet to hear anything new about the Solid Silicon S1 or how libre Power11 will end up being. Hopefully as the Microwatt design gets more efficient, at least the very smallest Power ISA systems will now have some additional flexibilities to work with.
Will this new features work on Artic?
ReplyDeleteI think we _have_ heard that Power11 will not be any more open than Power10, as Bill Starke's "mea culpa" suggests the memory system remains qualitatively unchanged.
ReplyDeletehttps://youtu.be/v9S_w_Bj3oo
ReplyDeleteI wonder how easily you could transplant ISA 3.1 (which I'm mostly suggesting for likely feature parity with S1, even if I don't like the VLI either) and/or backport any of the LibreSOC work onto Microwatt, that did seem really promising and it'd be a shame to let it go to waste.
ReplyDeleteHere's hoping we can eventually have a multi-core Power Pi to play with.
ReplyDelete